年度 | 2007 |
---|---|
全部作者 | 洪浩喬 |
論文名稱 | Sheng-Chaun Liang, Ding-Jyun Huang, Chen-Kang Ho, and Hao-Chiao Hong, “10 GSamples/s, 4-bit, 1.2V, Design-for-Testability ADC and DAC in 0.13um CMOS Technology,” in Proceedings of the IEEE Asian Solid-State Circuits Conference (A-SSCC), pp. 416-419, October, 2007, (acceptance rate=32%, 107/332) (IEEE) |
發表日期 | 2014-11-10 |
語言 | 中文 |